Digital Logic by Hand: Gates, Truth Tables, Karnaugh Maps, Binary Adders, Multiplexers & Decoders, Flip-Flops, Counters, Shift Registers & State Machines

What you'll build

What you will be able to do

Each lab ends with a concrete result that you build yourself and the checker confirms, cell by cell.

• Run 12 test vectors through the basic gates of a toy 4-bit computer, write every gate as a 0/1 formula, count how often each output is 1 and build an XOR from four NAND gates.
• Turn the truth table of a toy 2-out-of-3 sensor voter into its function number, write the canonical sum of products from its minterms, simplify it and use a check column to catch a colleague's shortcut that is wrong on one row.
• Place a 4-input function into a Karnaugh map in Gray order, mark its don't-care cell, size three groups, count the literals before and after simplification and prove the simplified expression on all 16 rows.
• Split numbers into bits with MOD and INT, fill the truth table of a full adder, add 11 + 6 bit by bit in a 4-bit ripple-carry adder, rebuild the result with SUMPRODUCT and raise the overflow flag.
• Decode two select bits into four one-hot lines, use them to build a 4-to-1 multiplexer, drive a toy seven-segment display from a lookup table with XLOOKUP and add an even-parity bit to every 4-bit code.
• Step an SR latch and D, JK and T flip-flops through 12 steps: each new state comes from the row above, the flip-flops change only on rising clock edges, and a timing chart shows how D is sampled.
• Clock a 3-bit counter with an enable input and read its bits, build a mod-6 counter with a synchronous reset, shift a serial bit stream through a 4-bit register and count how often the pattern 1011 arrives.
• Run a toy pedestrian-crossing controller as a state machine for 24 clock ticks – next state from a state table via a combined key, outputs per state – then add up the path delays and find the highest clock frequency the timing allows.