Semiconductor Yield Economics: Dies per Wafer, Yield Models & Cost per Chip

What you'll build

What you will be able to do

Each lab ends with a concrete result that you build yourself and the checker confirms, cell by cell.

• Work out the usable area of a 300 mm wafer and estimate how many whole dies of five designs fit on it, using the standard dies-per-wafer approximation with its edge-loss term.
• Turn six months of falling defect density into expected defects per die, Poisson die yield, good dies per wafer and the wafers to start for 50,000 good chips.
• Compare three classic yield models for eight die sizes at the same defect density and chart how yield falls as dies get bigger.
• Compute good dies, cost per gross and per good die for four products, the yield penalty, and what five extra yield points are worth for the big accelerator.
• Carry the cost of a good die through wafer probe, packaging and final test, and divide by the yields along the way to get the real cost of each chip you can ship.
• Shrink the HX-7 to 55 % of its area on a newer, dearer process and compare gross dies, yield, good dies and cost per good die in the first year and once the process has matured.
• Split a month of HX-7 good dies into speed grades with NORM.DIST, price each bin and find the blended revenue per good die.
• Size the fab's capacity from its bottleneck lithography tools, turn chip demand into wafer starts, and see how utilisation drives the cost of every wafer.